Phase-locked loops are widely used for many applications in modern receivers, transmitters, and transceivers. Such circuitry is sometimes utilized in a transceiver to provide a local oscillator signal when the transceiver is in the receive mode and to provide a modulated signal for transmission when the transceiver is in the transmit mode.
More specifically, a commonly used prior art phase-locked loop (PLL) includes a phase detector having an output coupled through a loop filter to control the frequency of a voltage controlled oscillator (VCO). Some of the output of the VCO is fed back through a divide-by-N circuit to a first input of the phase detector. A constant reference frequency signal is applied to a second input of the phase detector by a crystal oscillator, for instance.
The frequency of the VCO output signal is changed by changing "N" of the divide-by-N circuit. For example, if the reference oscillator is operating at 5 Megahertz (MH.sub.z) and N=100, the VCO would provide a loop output signal of 500 MH.sub.z. This signal is divided by 100 to provide a 5 MH.sub.z feedback signal to the phase detector which is compared with the 5 MH.sub.z reference oscillator signal. The phase difference between these signals is filtered by the loop filter to provide a control signal to adjust the frequency and hence the phase of the VCO to eliminate the phase difference. If N is changed to 99 then the VCO would provide an output signal having a frequency of 495 MH.sub.z. Therefore, this type of prior art PLL circuitry is useful for providing output signals having any one of a number of discrete output frequencies which are multiples of the frequency of the reference oscillator and which substantially have the frequency stability of the crystal reference oscillator.
The foregoing PLL configuration can be used as a frequency modulator by adding a summation circuit between the loop filter and the VCO which combines the control signal from the loop filter with a modulating information signal to provide a composite control signal to the VCO. Thus, the frequency of the output signal of the VCO is modulated or deviated in response to the amplitude of the information signal to provide a frequency modulated (FM) output signal. It is necessary for the modulation frequency to be outside of the loop bandwidth of this prior art PLL. Otherwise, the PLL will treat the modulation as noise and try to eliminate it. Therefore, this prior art modulator configuration is unsuitable for many applications requiring that the loop bandwidth include the modulation frequency to meet settling time or noise elimination requirements.
One prior art solution to the settling time problem is to use a narrow loop bandwidth PLL which uses bandwidth switching circuitry to reduce settling time. This bandwidth switching circuitry unfortunately performs in a satisfactory manner only in applications requiring a moderate increase in loop bandwidth of less than 10 times.
Another sometimes simpler prior art solution to the foregoing bandwidth problem has been to utilize a dual port modulation PLL circuit which allows modulation rates at frequencies within the loop bandwidth. Such circuitry overcomes the limitations of modulation frequencies within the loop bandwidth by applying modulation at both a VCO summing port connected between the loop filter and VCO and through an integrating filter to an additional phase summing port connected between the output of the phase detector and the loop filter. The VCO provides a low pass operating characteristic in response to the phase port modulation and a high pass characteristic in response to the VCO port modulation. If the phase port modulation is combined with the VCO port modulation at the correct amplitude and phase, the overall FM operating characteristic is "flat" over the VCO frequency range, as will subsequently be explained in more detail. This technique works well in applications where the VCO gain and the divide-by-N ratio, N are constant such as in single center frequency or narrow VCO bandwidth applications. However, this prior art configuration is not suitable for applications which require wide VCO bandwidths such as those employed in modern military and transceivers which require synthesizers that can be switched to move or "hop" between a plurality of frequencies over a wide bandwidth in a predetermined manner. This is because the divider ratio, N and the VCO gain change considerably over the required wide VCO operating range. These changes in VCO gain and N cause a corresponding variation in the modulation frequency response and loop bandwidth so that the frequency deviation of the modulated output signal tends to undesirably vary with the frequency of the modulating signal and therefore is not flat or constant with changes in modulation frequency. The changes in loop bandwidth provide an undesirable effect on settling time and the changes in modulation response provide an undesired effect on the frequency deviation of the VCO.